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VLSI Physical Design: From Graph Partitioning to Timing Closure



Design and optimization of integrated circuits are essential to the creation of new semiconductor chips, and physical optimizations are becoming more prominent as a result of semiconductor scaling. Modern chip design has become so complex that it is largely performed by specialized software, which is frequently updated to address advances in semiconductor technologies and increased problem complexities. A user of such software needs a high-level understanding of the underlying mathematical models and algorithms. On the other hand, a developer of such software must have a keen understanding of computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. VLSI Physical Design: From Graph Partitioning to Timing Closure introduces and compares algorithms that are used during the physical design phase of integrated-circuit design, wherein a geometric chip layout is produced starting from an abstract circuit design. The emphasis is on essential and fundamental techniques, ranging from hypergraph partitioning and circuit placement to timing closure


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EBUPT180237004.071/EBUPT180237Perpustakaan Pusat (EBUPT180237)T E R S E D I A

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Informasi Detil

Judul Seri
-
No. Panggil
004.071/EBUPT180237
Penerbit Springer Dordrecht Heidelberg: New York.,
Deskripsi Fisik
1 online resource (xi, 310 p.) : ilustr
Bahasa
English
ISBN/ISSN/NPM
978-90-481-9591-6
Klasifikasi
004.071
Tipe Isi
-
Tipe Media
-
Tipe Pembawa
-
Edisi
-
Subyek
Info Detil Spesifik
-
Pernyataan Tanggungjawab

Versi lain/terkait

Tidak tersedia versi lain



  • Perpustakaan
  • Universitas
  • Pancasila

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